An analog-to-digital converter (ADC) is used to convert an analog input signal to a digital output signal. Ideally, the digital output signal provides an accurate representation of the analog input signal. However, in practice, the digital output signal of the ADC does not accurately represent the analog input signal. In other words, the ADC fails to provide a linear response to the analog input signal. There are many sources of error in an ADC. For example, systematic errors may exist in an ADC due to mismatch between components, e.g., active (amplifiers) or passive (resistors, capacitors) devices. The mismatch causes degradation in the static performance of the ADC that may be represented by the integral non-linearity (INL) and differential non-linearity (DNL). Systematic errors become more severe for high-resolution ADCs and limit the ENOB of the ADCs.
There are several different types of ADCs including successive approximation register (SAR) ADCs, pipeline ADCs, flash ADCs, sigma-delta ADCs, VCO-based ADCs, etc. In a SAR ADC, the dominant source of systematic errors may be the mismatch in capacitors that may cause errors in gain, offset, and limit the INL and DNL. In a pipeline ADC, the dominant source of static errors may be the mismatch between active devices in gain stages, amplifiers, comparators, and/or in current steering DAC. In a VCO-based ADC, the dominant source of systematic errors may be in the mismatch between active devices in gm stages and in gm-C values in ring oscillators.
To obtain good static performance that is characterized by the INL and DNL, an ADC is typically subjected to an initial calibration during manufacture. For example, to measure the INL/DNL, a high-precision DC voltage ramp with a step size of 1-LSB or a precise low-frequency sinusoidal reference signal is provided to the input of the ADC. The need of a high-precision DC signal or sinusoidal reference signal requires that the measurement and calibration of the ADC be performed in a fixed location (e.g., a calibration lab). This calibration procedure requires precise and expensive measuring components and cannot be performed on-chip by the ADC.